
array:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400480 <.init>:
  400480:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400484:	910003fd 	mov	x29, sp
  400488:	94000030 	bl	400548 <printf@plt+0x58>
  40048c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400490:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004a0 <__libc_start_main@plt-0x20>:
  4004a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004a4:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004a8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ac:	913fe210 	add	x16, x16, #0xff8
  4004b0:	d61f0220 	br	x17
  4004b4:	d503201f 	nop
  4004b8:	d503201f 	nop
  4004bc:	d503201f 	nop

00000000004004c0 <__libc_start_main@plt>:
  4004c0:	d0000090 	adrp	x16, 412000 <printf@plt+0x11b10>
  4004c4:	f9400211 	ldr	x17, [x16]
  4004c8:	91000210 	add	x16, x16, #0x0
  4004cc:	d61f0220 	br	x17

00000000004004d0 <__gmon_start__@plt>:
  4004d0:	d0000090 	adrp	x16, 412000 <printf@plt+0x11b10>
  4004d4:	f9400611 	ldr	x17, [x16, #8]
  4004d8:	91002210 	add	x16, x16, #0x8
  4004dc:	d61f0220 	br	x17

00000000004004e0 <abort@plt>:
  4004e0:	d0000090 	adrp	x16, 412000 <printf@plt+0x11b10>
  4004e4:	f9400a11 	ldr	x17, [x16, #16]
  4004e8:	91004210 	add	x16, x16, #0x10
  4004ec:	d61f0220 	br	x17

00000000004004f0 <printf@plt>:
  4004f0:	d0000090 	adrp	x16, 412000 <printf@plt+0x11b10>
  4004f4:	f9400e11 	ldr	x17, [x16, #24]
  4004f8:	91006210 	add	x16, x16, #0x18
  4004fc:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400500 <.text>:
  400500:	d280001d 	mov	x29, #0x0                   	// #0
  400504:	d280001e 	mov	x30, #0x0                   	// #0
  400508:	aa0003e5 	mov	x5, x0
  40050c:	f94003e1 	ldr	x1, [sp]
  400510:	910023e2 	add	x2, sp, #0x8
  400514:	910003e6 	mov	x6, sp
  400518:	580000c0 	ldr	x0, 400530 <printf@plt+0x40>
  40051c:	580000e3 	ldr	x3, 400538 <printf@plt+0x48>
  400520:	58000104 	ldr	x4, 400540 <printf@plt+0x50>
  400524:	97ffffe7 	bl	4004c0 <__libc_start_main@plt>
  400528:	97ffffee 	bl	4004e0 <abort@plt>
  40052c:	00000000 	.inst	0x00000000 ; undefined
  400530:	00400c48 	.inst	0x00400c48 ; undefined
  400534:	00000000 	.inst	0x00000000 ; undefined
  400538:	00400c78 	.inst	0x00400c78 ; undefined
  40053c:	00000000 	.inst	0x00000000 ; undefined
  400540:	00400cf8 	.inst	0x00400cf8 ; undefined
  400544:	00000000 	.inst	0x00000000 ; undefined
  400548:	b0000080 	adrp	x0, 411000 <printf@plt+0x10b10>
  40054c:	f947f000 	ldr	x0, [x0, #4064]
  400550:	b4000040 	cbz	x0, 400558 <printf@plt+0x68>
  400554:	17ffffdf 	b	4004d0 <__gmon_start__@plt>
  400558:	d65f03c0 	ret
  40055c:	00000000 	.inst	0x00000000 ; undefined
  400560:	d0000080 	adrp	x0, 412000 <printf@plt+0x11b10>
  400564:	9100c000 	add	x0, x0, #0x30
  400568:	d0000081 	adrp	x1, 412000 <printf@plt+0x11b10>
  40056c:	9100c021 	add	x1, x1, #0x30
  400570:	eb00003f 	cmp	x1, x0
  400574:	540000a0 	b.eq	400588 <printf@plt+0x98>  // b.none
  400578:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  40057c:	f9468c21 	ldr	x1, [x1, #3352]
  400580:	b4000041 	cbz	x1, 400588 <printf@plt+0x98>
  400584:	d61f0020 	br	x1
  400588:	d65f03c0 	ret
  40058c:	d503201f 	nop
  400590:	d0000080 	adrp	x0, 412000 <printf@plt+0x11b10>
  400594:	9100c000 	add	x0, x0, #0x30
  400598:	d0000081 	adrp	x1, 412000 <printf@plt+0x11b10>
  40059c:	9100c021 	add	x1, x1, #0x30
  4005a0:	cb000021 	sub	x1, x1, x0
  4005a4:	9343fc21 	asr	x1, x1, #3
  4005a8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005ac:	9341fc21 	asr	x1, x1, #1
  4005b0:	b40000a1 	cbz	x1, 4005c4 <printf@plt+0xd4>
  4005b4:	90000002 	adrp	x2, 400000 <__libc_start_main@plt-0x4c0>
  4005b8:	f9469042 	ldr	x2, [x2, #3360]
  4005bc:	b4000042 	cbz	x2, 4005c4 <printf@plt+0xd4>
  4005c0:	d61f0040 	br	x2
  4005c4:	d65f03c0 	ret
  4005c8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4005cc:	910003fd 	mov	x29, sp
  4005d0:	f9000bf3 	str	x19, [sp, #16]
  4005d4:	d0000093 	adrp	x19, 412000 <printf@plt+0x11b10>
  4005d8:	3940c260 	ldrb	w0, [x19, #48]
  4005dc:	35000080 	cbnz	w0, 4005ec <printf@plt+0xfc>
  4005e0:	97ffffe0 	bl	400560 <printf@plt+0x70>
  4005e4:	52800020 	mov	w0, #0x1                   	// #1
  4005e8:	3900c260 	strb	w0, [x19, #48]
  4005ec:	f9400bf3 	ldr	x19, [sp, #16]
  4005f0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4005f4:	d65f03c0 	ret
  4005f8:	17ffffe6 	b	400590 <printf@plt+0xa0>
  4005fc:	d10703ff 	sub	sp, sp, #0x1c0
  400600:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400604:	9134a001 	add	x1, x0, #0xd28
  400608:	910643e0 	add	x0, sp, #0x190
  40060c:	a9400c22 	ldp	x2, x3, [x1]
  400610:	a9000c02 	stp	x2, x3, [x0]
  400614:	a9410c22 	ldp	x2, x3, [x1, #16]
  400618:	a9010c02 	stp	x2, x3, [x0, #16]
  40061c:	a9420821 	ldp	x1, x2, [x1, #32]
  400620:	a9020801 	stp	x1, x2, [x0, #32]
  400624:	52800020 	mov	w0, #0x1                   	// #1
  400628:	b90003e0 	str	w0, [sp]
  40062c:	52800020 	mov	w0, #0x1                   	// #1
  400630:	b90007e0 	str	w0, [sp, #4]
  400634:	52800020 	mov	w0, #0x1                   	// #1
  400638:	b9000be0 	str	w0, [sp, #8]
  40063c:	52800020 	mov	w0, #0x1                   	// #1
  400640:	b9000fe0 	str	w0, [sp, #12]
  400644:	52800020 	mov	w0, #0x1                   	// #1
  400648:	b90013e0 	str	w0, [sp, #16]
  40064c:	52800020 	mov	w0, #0x1                   	// #1
  400650:	b90017e0 	str	w0, [sp, #20]
  400654:	52800020 	mov	w0, #0x1                   	// #1
  400658:	b9001be0 	str	w0, [sp, #24]
  40065c:	52800020 	mov	w0, #0x1                   	// #1
  400660:	b9001fe0 	str	w0, [sp, #28]
  400664:	52800020 	mov	w0, #0x1                   	// #1
  400668:	b90023e0 	str	w0, [sp, #32]
  40066c:	52800020 	mov	w0, #0x1                   	// #1
  400670:	b90027e0 	str	w0, [sp, #36]
  400674:	d503201f 	nop
  400678:	910703ff 	add	sp, sp, #0x1c0
  40067c:	d65f03c0 	ret
  400680:	d10183ff 	sub	sp, sp, #0x60
  400684:	d503201f 	nop
  400688:	910183ff 	add	sp, sp, #0x60
  40068c:	d65f03c0 	ret
  400690:	d10183ff 	sub	sp, sp, #0x60
  400694:	52800c80 	mov	w0, #0x64                  	// #100
  400698:	b9003be0 	str	w0, [sp, #56]
  40069c:	52800640 	mov	w0, #0x32                  	// #50
  4006a0:	b90013e0 	str	w0, [sp, #16]
  4006a4:	52800c20 	mov	w0, #0x61                  	// #97
  4006a8:	390003e0 	strb	w0, [sp]
  4006ac:	52800c40 	mov	w0, #0x62                  	// #98
  4006b0:	390007e0 	strb	w0, [sp, #1]
  4006b4:	52800c60 	mov	w0, #0x63                  	// #99
  4006b8:	39000be0 	strb	w0, [sp, #2]
  4006bc:	52800c80 	mov	w0, #0x64                  	// #100
  4006c0:	39000fe0 	strb	w0, [sp, #3]
  4006c4:	52800ca0 	mov	w0, #0x65                  	// #101
  4006c8:	390013e0 	strb	w0, [sp, #4]
  4006cc:	52800cc0 	mov	w0, #0x66                  	// #102
  4006d0:	390017e0 	strb	w0, [sp, #5]
  4006d4:	39001bff 	strb	wzr, [sp, #6]
  4006d8:	d503201f 	nop
  4006dc:	910183ff 	add	sp, sp, #0x60
  4006e0:	d65f03c0 	ret
  4006e4:	d100c3ff 	sub	sp, sp, #0x30
  4006e8:	52800020 	mov	w0, #0x1                   	// #1
  4006ec:	b90003e0 	str	w0, [sp]
  4006f0:	52800040 	mov	w0, #0x2                   	// #2
  4006f4:	b90007e0 	str	w0, [sp, #4]
  4006f8:	52800060 	mov	w0, #0x3                   	// #3
  4006fc:	b9000be0 	str	w0, [sp, #8]
  400700:	52800080 	mov	w0, #0x4                   	// #4
  400704:	b9000fe0 	str	w0, [sp, #12]
  400708:	528000a0 	mov	w0, #0x5                   	// #5
  40070c:	b90013e0 	str	w0, [sp, #16]
  400710:	528000c0 	mov	w0, #0x6                   	// #6
  400714:	b90017e0 	str	w0, [sp, #20]
  400718:	528000e0 	mov	w0, #0x7                   	// #7
  40071c:	b9001be0 	str	w0, [sp, #24]
  400720:	52800100 	mov	w0, #0x8                   	// #8
  400724:	b9001fe0 	str	w0, [sp, #28]
  400728:	d503201f 	nop
  40072c:	9100c3ff 	add	sp, sp, #0x30
  400730:	d65f03c0 	ret
  400734:	a9b97bfd 	stp	x29, x30, [sp, #-112]!
  400738:	910003fd 	mov	x29, sp
  40073c:	52800140 	mov	w0, #0xa                   	// #10
  400740:	b90013a0 	str	w0, [x29, #16]
  400744:	52800280 	mov	w0, #0x14                  	// #20
  400748:	b90017a0 	str	w0, [x29, #20]
  40074c:	910043a0 	add	x0, x29, #0x10
  400750:	f90037a0 	str	x0, [x29, #104]
  400754:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400758:	91362000 	add	x0, x0, #0xd88
  40075c:	910063a2 	add	x2, x29, #0x18
  400760:	aa0003e3 	mov	x3, x0
  400764:	a9400460 	ldp	x0, x1, [x3]
  400768:	a9000440 	stp	x0, x1, [x2]
  40076c:	a9410460 	ldp	x0, x1, [x3, #16]
  400770:	a9010440 	stp	x0, x1, [x2, #16]
  400774:	910063a0 	add	x0, x29, #0x18
  400778:	f90033a0 	str	x0, [x29, #96]
  40077c:	52800041 	mov	w1, #0x2                   	// #2
  400780:	f94037a0 	ldr	x0, [x29, #104]
  400784:	94000021 	bl	400808 <printf@plt+0x318>
  400788:	b9005fa0 	str	w0, [x29, #92]
  40078c:	52800041 	mov	w1, #0x2                   	// #2
  400790:	f94033a0 	ldr	x0, [x29, #96]
  400794:	94000035 	bl	400868 <printf@plt+0x378>
  400798:	b9005ba0 	str	w0, [x29, #88]
  40079c:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4007a0:	9136a000 	add	x0, x0, #0xda8
  4007a4:	9100e3a2 	add	x2, x29, #0x38
  4007a8:	aa0003e3 	mov	x3, x0
  4007ac:	a9400460 	ldp	x0, x1, [x3]
  4007b0:	a9000440 	stp	x0, x1, [x2]
  4007b4:	f9400860 	ldr	x0, [x3, #16]
  4007b8:	f9000840 	str	x0, [x2, #16]
  4007bc:	9100e3a0 	add	x0, x29, #0x38
  4007c0:	528000c1 	mov	w1, #0x6                   	// #6
  4007c4:	94000011 	bl	400808 <printf@plt+0x318>
  4007c8:	b90057a0 	str	w0, [x29, #84]
  4007cc:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4007d0:	91356000 	add	x0, x0, #0xd58
  4007d4:	b9405fa1 	ldr	w1, [x29, #92]
  4007d8:	97ffff46 	bl	4004f0 <printf@plt>
  4007dc:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4007e0:	9135a000 	add	x0, x0, #0xd68
  4007e4:	b9405ba1 	ldr	w1, [x29, #88]
  4007e8:	97ffff42 	bl	4004f0 <printf@plt>
  4007ec:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4007f0:	9135e000 	add	x0, x0, #0xd78
  4007f4:	b94057a1 	ldr	w1, [x29, #84]
  4007f8:	97ffff3e 	bl	4004f0 <printf@plt>
  4007fc:	d503201f 	nop
  400800:	a8c77bfd 	ldp	x29, x30, [sp], #112
  400804:	d65f03c0 	ret
  400808:	d10083ff 	sub	sp, sp, #0x20
  40080c:	f90007e0 	str	x0, [sp, #8]
  400810:	b90007e1 	str	w1, [sp, #4]
  400814:	b9001bff 	str	wzr, [sp, #24]
  400818:	b9001fff 	str	wzr, [sp, #28]
  40081c:	1400000c 	b	40084c <printf@plt+0x35c>
  400820:	b9801fe0 	ldrsw	x0, [sp, #28]
  400824:	d37ef400 	lsl	x0, x0, #2
  400828:	f94007e1 	ldr	x1, [sp, #8]
  40082c:	8b000020 	add	x0, x1, x0
  400830:	b9400000 	ldr	w0, [x0]
  400834:	b9401be1 	ldr	w1, [sp, #24]
  400838:	0b000020 	add	w0, w1, w0
  40083c:	b9001be0 	str	w0, [sp, #24]
  400840:	b9401fe0 	ldr	w0, [sp, #28]
  400844:	11000400 	add	w0, w0, #0x1
  400848:	b9001fe0 	str	w0, [sp, #28]
  40084c:	b9401fe1 	ldr	w1, [sp, #28]
  400850:	b94007e0 	ldr	w0, [sp, #4]
  400854:	6b00003f 	cmp	w1, w0
  400858:	54fffe4b 	b.lt	400820 <printf@plt+0x330>  // b.tstop
  40085c:	b9401be0 	ldr	w0, [sp, #24]
  400860:	910083ff 	add	sp, sp, #0x20
  400864:	d65f03c0 	ret
  400868:	d10083ff 	sub	sp, sp, #0x20
  40086c:	f90007e0 	str	x0, [sp, #8]
  400870:	b90007e1 	str	w1, [sp, #4]
  400874:	b90017ff 	str	wzr, [sp, #20]
  400878:	b9001fff 	str	wzr, [sp, #28]
  40087c:	14000015 	b	4008d0 <printf@plt+0x3e0>
  400880:	b9001bff 	str	wzr, [sp, #24]
  400884:	1400000d 	b	4008b8 <printf@plt+0x3c8>
  400888:	b9801fe0 	ldrsw	x0, [sp, #28]
  40088c:	d37cec00 	lsl	x0, x0, #4
  400890:	f94007e1 	ldr	x1, [sp, #8]
  400894:	8b000020 	add	x0, x1, x0
  400898:	b9801be1 	ldrsw	x1, [sp, #24]
  40089c:	b8617800 	ldr	w0, [x0, x1, lsl #2]
  4008a0:	b94017e1 	ldr	w1, [sp, #20]
  4008a4:	0b000020 	add	w0, w1, w0
  4008a8:	b90017e0 	str	w0, [sp, #20]
  4008ac:	b9401be0 	ldr	w0, [sp, #24]
  4008b0:	11000400 	add	w0, w0, #0x1
  4008b4:	b9001be0 	str	w0, [sp, #24]
  4008b8:	b9401be0 	ldr	w0, [sp, #24]
  4008bc:	71000c1f 	cmp	w0, #0x3
  4008c0:	54fffe4d 	b.le	400888 <printf@plt+0x398>
  4008c4:	b9401fe0 	ldr	w0, [sp, #28]
  4008c8:	11000400 	add	w0, w0, #0x1
  4008cc:	b9001fe0 	str	w0, [sp, #28]
  4008d0:	b9401fe1 	ldr	w1, [sp, #28]
  4008d4:	b94007e0 	ldr	w0, [sp, #4]
  4008d8:	6b00003f 	cmp	w1, w0
  4008dc:	54fffd2b 	b.lt	400880 <printf@plt+0x390>  // b.tstop
  4008e0:	b94017e0 	ldr	w0, [sp, #20]
  4008e4:	910083ff 	add	sp, sp, #0x20
  4008e8:	d65f03c0 	ret
  4008ec:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  4008f0:	910003fd 	mov	x29, sp
  4008f4:	a90153f3 	stp	x19, x20, [sp, #16]
  4008f8:	a9025bf5 	stp	x21, x22, [sp, #32]
  4008fc:	f9001bf7 	str	x23, [sp, #48]
  400900:	910003f4 	mov	x20, sp
  400904:	aa1403f7 	mov	x23, x20
  400908:	52800074 	mov	w20, #0x3                   	// #3
  40090c:	b90053b4 	str	w20, [x29, #80]
  400910:	52800094 	mov	w20, #0x4                   	// #4
  400914:	b90057b4 	str	w20, [x29, #84]
  400918:	b94057b4 	ldr	w20, [x29, #84]
  40091c:	b94053b5 	ldr	w21, [x29, #80]
  400920:	93407e96 	sxtw	x22, w20
  400924:	d10006d6 	sub	x22, x22, #0x1
  400928:	f9002fb6 	str	x22, [x29, #88]
  40092c:	93407e96 	sxtw	x22, w20
  400930:	aa1603f2 	mov	x18, x22
  400934:	d2800013 	mov	x19, #0x0                   	// #0
  400938:	d37bfe56 	lsr	x22, x18, #59
  40093c:	d37bea6d 	lsl	x13, x19, #5
  400940:	aa0d02cd 	orr	x13, x22, x13
  400944:	d37bea4c 	lsl	x12, x18, #5
  400948:	93407eac 	sxtw	x12, w21
  40094c:	d100058c 	sub	x12, x12, #0x1
  400950:	f90027ac 	str	x12, [x29, #72]
  400954:	93407e8c 	sxtw	x12, w20
  400958:	aa0c03e6 	mov	x6, x12
  40095c:	d2800007 	mov	x7, #0x0                   	// #0
  400960:	93407eac 	sxtw	x12, w21
  400964:	aa0c03e4 	mov	x4, x12
  400968:	d2800005 	mov	x5, #0x0                   	// #0
  40096c:	9b047ccd 	mul	x13, x6, x4
  400970:	9bc47ccc 	umulh	x12, x6, x4
  400974:	9b0430ec 	madd	x12, x7, x4, x12
  400978:	9b0530cc 	madd	x12, x6, x5, x12
  40097c:	aa0d03f0 	mov	x16, x13
  400980:	aa0c03f1 	mov	x17, x12
  400984:	d37bfe04 	lsr	x4, x16, #59
  400988:	d37bea2b 	lsl	x11, x17, #5
  40098c:	aa0b008b 	orr	x11, x4, x11
  400990:	d37bea0a 	lsl	x10, x16, #5
  400994:	93407e84 	sxtw	x4, w20
  400998:	aa0403e2 	mov	x2, x4
  40099c:	d2800003 	mov	x3, #0x0                   	// #0
  4009a0:	93407ea4 	sxtw	x4, w21
  4009a4:	aa0403e0 	mov	x0, x4
  4009a8:	d2800001 	mov	x1, #0x0                   	// #0
  4009ac:	9b007c45 	mul	x5, x2, x0
  4009b0:	9bc07c44 	umulh	x4, x2, x0
  4009b4:	9b001064 	madd	x4, x3, x0, x4
  4009b8:	9b011044 	madd	x4, x2, x1, x4
  4009bc:	aa0503ee 	mov	x14, x5
  4009c0:	aa0403ef 	mov	x15, x4
  4009c4:	d37bfdc0 	lsr	x0, x14, #59
  4009c8:	d37be9e9 	lsl	x9, x15, #5
  4009cc:	aa090009 	orr	x9, x0, x9
  4009d0:	d37be9c8 	lsl	x8, x14, #5
  4009d4:	93407e81 	sxtw	x1, w20
  4009d8:	93407ea0 	sxtw	x0, w21
  4009dc:	9b007c20 	mul	x0, x1, x0
  4009e0:	d37ef400 	lsl	x0, x0, #2
  4009e4:	91000c00 	add	x0, x0, #0x3
  4009e8:	91003c00 	add	x0, x0, #0xf
  4009ec:	d344fc00 	lsr	x0, x0, #4
  4009f0:	d37cec00 	lsl	x0, x0, #4
  4009f4:	cb2063ff 	sub	sp, sp, x0
  4009f8:	910003e0 	mov	x0, sp
  4009fc:	91000c00 	add	x0, x0, #0x3
  400a00:	d342fc00 	lsr	x0, x0, #2
  400a04:	d37ef400 	lsl	x0, x0, #2
  400a08:	f90023a0 	str	x0, [x29, #64]
  400a0c:	910002ff 	mov	sp, x23
  400a10:	d503201f 	nop
  400a14:	910003bf 	mov	sp, x29
  400a18:	a94153f3 	ldp	x19, x20, [sp, #16]
  400a1c:	a9425bf5 	ldp	x21, x22, [sp, #32]
  400a20:	f9401bf7 	ldr	x23, [sp, #48]
  400a24:	a8c67bfd 	ldp	x29, x30, [sp], #96
  400a28:	d65f03c0 	ret
  400a2c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400a30:	910003fd 	mov	x29, sp
  400a34:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400a38:	913a0000 	add	x0, x0, #0xe80
  400a3c:	9100a3a2 	add	x2, x29, #0x28
  400a40:	aa0003e3 	mov	x3, x0
  400a44:	a9400460 	ldp	x0, x1, [x3]
  400a48:	a9000440 	stp	x0, x1, [x2]
  400a4c:	b9401060 	ldr	w0, [x3, #16]
  400a50:	b9001040 	str	w0, [x2, #16]
  400a54:	9100a3a0 	add	x0, x29, #0x28
  400a58:	91005000 	add	x0, x0, #0x14
  400a5c:	f90013a0 	str	x0, [x29, #32]
  400a60:	9100a3a0 	add	x0, x29, #0x28
  400a64:	11000400 	add	w0, w0, #0x1
  400a68:	93407c00 	sxtw	x0, w0
  400a6c:	f9000fa0 	str	x0, [x29, #24]
  400a70:	9100a3a0 	add	x0, x29, #0x28
  400a74:	91005000 	add	x0, x0, #0x14
  400a78:	b90017a0 	str	w0, [x29, #20]
  400a7c:	9100a3a1 	add	x1, x29, #0x28
  400a80:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400a84:	91370000 	add	x0, x0, #0xdc0
  400a88:	97fffe9a 	bl	4004f0 <printf@plt>
  400a8c:	9100a3a1 	add	x1, x29, #0x28
  400a90:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400a94:	91374000 	add	x0, x0, #0xdd0
  400a98:	97fffe96 	bl	4004f0 <printf@plt>
  400a9c:	9100a3a0 	add	x0, x29, #0x28
  400aa0:	91001000 	add	x0, x0, #0x4
  400aa4:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  400aa8:	91370022 	add	x2, x1, #0xdc0
  400aac:	aa0003e1 	mov	x1, x0
  400ab0:	aa0203e0 	mov	x0, x2
  400ab4:	97fffe8f 	bl	4004f0 <printf@plt>
  400ab8:	9100a3a0 	add	x0, x29, #0x28
  400abc:	91005000 	add	x0, x0, #0x14
  400ac0:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  400ac4:	91374022 	add	x2, x1, #0xdd0
  400ac8:	aa0003e1 	mov	x1, x0
  400acc:	aa0203e0 	mov	x0, x2
  400ad0:	97fffe88 	bl	4004f0 <printf@plt>
  400ad4:	b94017a1 	ldr	w1, [x29, #20]
  400ad8:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400adc:	91378000 	add	x0, x0, #0xde0
  400ae0:	97fffe84 	bl	4004f0 <printf@plt>
  400ae4:	b94017a1 	ldr	w1, [x29, #20]
  400ae8:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400aec:	9137c000 	add	x0, x0, #0xdf0
  400af0:	97fffe80 	bl	4004f0 <printf@plt>
  400af4:	910053a1 	add	x1, x29, #0x14
  400af8:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400afc:	91380000 	add	x0, x0, #0xe00
  400b00:	97fffe7c 	bl	4004f0 <printf@plt>
  400b04:	f94013a0 	ldr	x0, [x29, #32]
  400b08:	b9400001 	ldr	w1, [x0]
  400b0c:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b10:	91384000 	add	x0, x0, #0xe10
  400b14:	97fffe77 	bl	4004f0 <printf@plt>
  400b18:	f94013a0 	ldr	x0, [x29, #32]
  400b1c:	b9400001 	ldr	w1, [x0]
  400b20:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b24:	91388000 	add	x0, x0, #0xe20
  400b28:	97fffe72 	bl	4004f0 <printf@plt>
  400b2c:	f94013a1 	ldr	x1, [x29, #32]
  400b30:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b34:	9138c000 	add	x0, x0, #0xe30
  400b38:	97fffe6e 	bl	4004f0 <printf@plt>
  400b3c:	f94013a1 	ldr	x1, [x29, #32]
  400b40:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b44:	91388000 	add	x0, x0, #0xe20
  400b48:	97fffe6a 	bl	4004f0 <printf@plt>
  400b4c:	910083a1 	add	x1, x29, #0x20
  400b50:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b54:	91390000 	add	x0, x0, #0xe40
  400b58:	97fffe66 	bl	4004f0 <printf@plt>
  400b5c:	f94013a0 	ldr	x0, [x29, #32]
  400b60:	d1001000 	sub	x0, x0, #0x4
  400b64:	b9400001 	ldr	w1, [x0]
  400b68:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b6c:	91394000 	add	x0, x0, #0xe50
  400b70:	97fffe60 	bl	4004f0 <printf@plt>
  400b74:	f9400fa1 	ldr	x1, [x29, #24]
  400b78:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b7c:	91398000 	add	x0, x0, #0xe60
  400b80:	97fffe5c 	bl	4004f0 <printf@plt>
  400b84:	910063a1 	add	x1, x29, #0x18
  400b88:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400b8c:	9139c000 	add	x0, x0, #0xe70
  400b90:	97fffe58 	bl	4004f0 <printf@plt>
  400b94:	52800000 	mov	w0, #0x0                   	// #0
  400b98:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400b9c:	d65f03c0 	ret
  400ba0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400ba4:	910003fd 	mov	x29, sp
  400ba8:	a9017fbf 	stp	xzr, xzr, [x29, #16]
  400bac:	a9027fbf 	stp	xzr, xzr, [x29, #32]
  400bb0:	f9001bbf 	str	xzr, [x29, #48]
  400bb4:	52800160 	mov	w0, #0xb                   	// #11
  400bb8:	b90013a0 	str	w0, [x29, #16]
  400bbc:	528001e0 	mov	w0, #0xf                   	// #15
  400bc0:	b90017a0 	str	w0, [x29, #20]
  400bc4:	52800280 	mov	w0, #0x14                  	// #20
  400bc8:	b9001ba0 	str	w0, [x29, #24]
  400bcc:	52800320 	mov	w0, #0x19                  	// #25
  400bd0:	b9001fa0 	str	w0, [x29, #28]
  400bd4:	528003c0 	mov	w0, #0x1e                  	// #30
  400bd8:	b90023a0 	str	w0, [x29, #32]
  400bdc:	910043a0 	add	x0, x29, #0x10
  400be0:	91002000 	add	x0, x0, #0x8
  400be4:	f9001fa0 	str	x0, [x29, #56]
  400be8:	f9401fa0 	ldr	x0, [x29, #56]
  400bec:	b9400001 	ldr	w1, [x0]
  400bf0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400bf4:	913a6000 	add	x0, x0, #0xe98
  400bf8:	97fffe3e 	bl	4004f0 <printf@plt>
  400bfc:	f9401fa0 	ldr	x0, [x29, #56]
  400c00:	d1001000 	sub	x0, x0, #0x4
  400c04:	b9400001 	ldr	w1, [x0]
  400c08:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400c0c:	913a6000 	add	x0, x0, #0xe98
  400c10:	97fffe38 	bl	4004f0 <printf@plt>
  400c14:	f9401fa0 	ldr	x0, [x29, #56]
  400c18:	d1002000 	sub	x0, x0, #0x8
  400c1c:	b9400001 	ldr	w1, [x0]
  400c20:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400c24:	913a6000 	add	x0, x0, #0xe98
  400c28:	97fffe32 	bl	4004f0 <printf@plt>
  400c2c:	b94037a1 	ldr	w1, [x29, #52]
  400c30:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400c34:	913a6000 	add	x0, x0, #0xe98
  400c38:	97fffe2e 	bl	4004f0 <printf@plt>
  400c3c:	52800000 	mov	w0, #0x0                   	// #0
  400c40:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400c44:	d65f03c0 	ret
  400c48:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400c4c:	910003fd 	mov	x29, sp
  400c50:	97fffeb9 	bl	400734 <printf@plt+0x244>
  400c54:	97fffe6a 	bl	4005fc <printf@plt+0x10c>
  400c58:	97fffe8a 	bl	400680 <printf@plt+0x190>
  400c5c:	97fffe8d 	bl	400690 <printf@plt+0x1a0>
  400c60:	97fffea1 	bl	4006e4 <printf@plt+0x1f4>
  400c64:	97ffff72 	bl	400a2c <printf@plt+0x53c>
  400c68:	97ffffce 	bl	400ba0 <printf@plt+0x6b0>
  400c6c:	52800000 	mov	w0, #0x0                   	// #0
  400c70:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400c74:	d65f03c0 	ret
  400c78:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400c7c:	910003fd 	mov	x29, sp
  400c80:	a901d7f4 	stp	x20, x21, [sp, #24]
  400c84:	b0000094 	adrp	x20, 411000 <printf@plt+0x10b10>
  400c88:	b0000095 	adrp	x21, 411000 <printf@plt+0x10b10>
  400c8c:	91374294 	add	x20, x20, #0xdd0
  400c90:	913722b5 	add	x21, x21, #0xdc8
  400c94:	a902dff6 	stp	x22, x23, [sp, #40]
  400c98:	cb150294 	sub	x20, x20, x21
  400c9c:	f9001ff8 	str	x24, [sp, #56]
  400ca0:	2a0003f6 	mov	w22, w0
  400ca4:	aa0103f7 	mov	x23, x1
  400ca8:	9343fe94 	asr	x20, x20, #3
  400cac:	aa0203f8 	mov	x24, x2
  400cb0:	97fffdf4 	bl	400480 <__libc_start_main@plt-0x40>
  400cb4:	b4000194 	cbz	x20, 400ce4 <printf@plt+0x7f4>
  400cb8:	f9000bb3 	str	x19, [x29, #16]
  400cbc:	d2800013 	mov	x19, #0x0                   	// #0
  400cc0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400cc4:	aa1803e2 	mov	x2, x24
  400cc8:	aa1703e1 	mov	x1, x23
  400ccc:	2a1603e0 	mov	w0, w22
  400cd0:	91000673 	add	x19, x19, #0x1
  400cd4:	d63f0060 	blr	x3
  400cd8:	eb13029f 	cmp	x20, x19
  400cdc:	54ffff21 	b.ne	400cc0 <printf@plt+0x7d0>  // b.any
  400ce0:	f9400bb3 	ldr	x19, [x29, #16]
  400ce4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400ce8:	a942dff6 	ldp	x22, x23, [sp, #40]
  400cec:	f9401ff8 	ldr	x24, [sp, #56]
  400cf0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400cf4:	d65f03c0 	ret
  400cf8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400cfc <.fini>:
  400cfc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400d00:	910003fd 	mov	x29, sp
  400d04:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400d08:	d65f03c0 	ret
